January 10, 2025
This study explores the application of this innovative approach to perform MLTRL calibrations both off-wafer and on-wafer. It highlights the interaction between WinCal, Python scripting, and analytical techniques to evaluate calibration repeatability.
FormFactor will be on the road in January attending some conferences. Here’s where you can find us.
104th ARFTG Microwave & Measurement Conference 2025
Date: January 19-22, 2025
Location: Sheraton Puerto Rico, San Juan, PR
FormFactor Booth: 207
Poster Session: Monday January 20 15:00-15:35
Pranav Kumar Shrivastava will be presenting – Human-Free Automated Recalibration for Drift Compensation and Over Multiple Temperatures On-Wafer Autonomous RF Measurements
The Autonomous RF Measurement Assistant integrates programmable positioners, a high-precision digital microscopy system, and advanced pattern recognition algorithms to deliver fully autonomous, hands-free calibration and measurement of RF devices across multiple temperature ranges. This cutting-edge system seamlessly manages the entire test flow for both thermal and ambient conditions, including automated calibration, real-time monitoring to prevent measurement drift, adaptive probe spacing to account for thermal expansion, and dynamic probing geometry adjustments for varying device layouts.
This study explores the application of this innovative approach to perform MLTRL calibrations both off-wafer and on-wafer. It highlights the interaction between WinCal, Python scripting, and analytical techniques to evaluate calibration repeatability. Additionally, the Performance Analyzer provides insights into probe placement precision and measurement repeatability during unattended, long-duration RF testing.
Date: January 21-23, 2025
Location: Santa Clara Convention Center, Santa Clara, CA
FormFactor Booth: 320
The 2025 meeting focuses on a new level in chip design: system-in-package (SiP). SiPs use advanced packaging to raise performance and reduce time-to-market. Co-optimization methods allow all design stages to proceed together. The event also covers supercomputer-in-a-package, a low-cost way to support generative AI. The Summit also offers sessions on the open chiplet economy, die-to-die interfaces, and working with foundries. Designers will learn to develop leading-edge chips at low cost. Topics include:
We hope to see you in Santa Clara or San Juan!